Chapter Technical Meeting
Tuesday, February 7, 2012

"High-Performance Chip Integration Technology"


Featured Presentation

Novel "Quilt Packaging" Technology
Enables 3D Multi-Die RF Modules to Emulate Monolithics

Presented by Jason M. Kulick
President, Co-Founder
Indiana Integrated Circuits, LLC

Click to Register

Abstract:

As processing nodes continue to decrease and tighter integration is desired, packaging has become a prominent factor in electronic system performance. To maintain the pace of innovation set by Moore's Law, industry has been focused on modifying or extending current technologies and implementing so-called 3D packaging (through-silicon-via, wafer level packaging, die stacking). Many applications exist where current 3D approaches are sufficient, but significant obstacles remain to wide-spread adoption. In many cases current approaches simply won't work due to thermal issues, CTE mismatches, and other difficulties. Indiana Integrated Circuits ("IIC") offers an alternative solution, particularly for RF/microwave systems composed of disparate materials. "Quilt Packaging(TM)" is a direct, edge-interconnect technology which has demonstrated less than 0.1 dB of insertion loss across the entire bandwidth from 50 MHz to over 100 GHz. Quilt Packaging or "QP" enables multiple die from disparate materials and/or processing technologies to be integrated into a monolithic-like system which performs as if it was created as a single chip. QP also has great potential in MEMs integration, power management, and large-format imaging array applications. IIC operates an essentially fabless business model, utilizing the brand new, nearly 10,000 sq. ft. Notre Dame Nanofabrication Facility as external users for prototyping and proof-of-concept work. In addition to working with partner companies to commercialize Quilt Packaging, IIC offers microfabrication and prototyping services, with customers ranging from large defense contractors to MEMs foundries to start-ups.

BIO:

Jason Kulick is an experienced research engineer in the semiconductor and MEMs arena, and founded IIC along with Dr. Gary H. Bernstein. Combining project management and research expertise, Mr. Kulick led the creation of IIC through its spin-out from the University of Notre Dame, subsequent patent licensing, and initial investment funding stages. Mr. Kulick is a Principal Investigator on IIC research projects and oversees day-to-day operations. He is a graduate of the University of Notre Dame with a degree in Electrical Engineering.

Copyright 2010 iMAPS New England Chapter
iMAPS New England Chapter
International Microelectronics And Packaging Society